These buffers/line drivers are designed to improve both the performance and PC board density of TRI-STATE buffers/drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133X.
• PNP inputs reduce DC loading on bus lines
• Hysteresis at data inputs improves noise margins
• Typical IOL (sink current) 54LS 12 mA 74LS 24 mA
• Typical IOH (source current) 54LS b12 mA 74LS b15 mA
• Typical propagation delay times Inverting 10.5 ns Noninverting 12 ns
• Typical enable/disable time 18 ns
• Typical power dissipation (enabled) Inverting 130 mW Noninverting 135 mW